Source-synchronous networks-on-chip : circuit and architectural interconnect modeling /
This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simulations. As a result, readers will get a complete picture of how...
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| Format: | eBook |
| Language: | English |
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New York, NY
Springer New York
2014.
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| Online Access: | Click here to view the full text content |
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