Source-synchronous networks-on-chip : circuit and architectural interconnect modeling /
This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simulations. As a result, readers will get a complete picture of how...
Saved in:
| Main Author: | |
|---|---|
| Corporate Author: | |
| Other Authors: | , |
| Format: | eBook |
| Language: | English |
| Published: |
New York, NY
Springer New York
2014.
|
| Subjects: | |
| Online Access: | Click here to view the full text content |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Be the first to leave a comment!