Kovalev, M., Müller, S. M., & Paul, W. J. (2014). A pipelined multi-core MIPS machine: Hardware implementation and correctness proof. Springer International Publishing.
Chicago Style (17th ed.) CitationKovalev, Mikhail, Silvia M. Müller, and Wolfgang J. Paul. A Pipelined Multi-core MIPS Machine: Hardware Implementation and Correctness Proof. Cham: Springer International Publishing, 2014.
MLA (8th ed.) CitationKovalev, Mikhail, et al. A Pipelined Multi-core MIPS Machine: Hardware Implementation and Correctness Proof. Springer International Publishing, 2014.
Warning: These citations may not always be 100% accurate.