A pipelined multi-core MIPS machine : hardware implementation and correctness proof /
This monograph is based on the third author's lectures on computer architecture, given in the summer semester 2013 at Saarland University, Germany. It contains a gate level construction of a multi-core machine with pipelined MIPS processor cores and a sequentially consistent shared memory. The...
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| Other Authors: | , |
| Format: | eBook |
| Language: | English |
| Published: |
Cham
Springer International Publishing
2014.
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| Series: | Lecture Notes in Computer Science
9000 |
| Subjects: | |
| Online Access: | Click here to view the full text content |
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