Advanced Hardware Design for Error Correcting Codes /
This book provides thorough coverage of error correcting techniques. It includes essential basic concepts and the latest advances on key topics in design, implementation, and optimization of hardware/software systems for error correction. The book's chapters are written by internationally recog...
Saved in:
Corporate Author: | |
---|---|
Other Authors: | , |
Format: | eBook |
Language: | English |
Published: |
Cham :
Springer International Publishing : Imprint: Springer,
2015.
|
Subjects: | |
Online Access: | Click here to view the full text content |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Table of Contents:
- User Needs
- Challenges and Limitations for Very High Throughput Decoder Architectures for Soft-Decoding
- Implementation of Polar Decoders
- Parallel architectures for Turbo Product Codes Decoding
- VLSI implementations of sphere detectors
- Stochastic Decoders for LDPC Codes
- MP-SoC/NoC architectures for error correction
- ASIP design for multi-standard channel decoders
- Hardware design of parallel interleaver architecture: a survey. .