Junctionless transistors: parametric study with conventional doping in mosfets - Nurul Huda Abdul Rahman (Institute of Nano Electronic Engineering, 2016)
The aim of this research is to investigate the device performances of junctionless transistors over the conventional MOSFET. All devices in this project were simulated in 3-Dimensional (3D) images that have been performed by using Technology Computer Aided Design (TCAD) of Atlas simulator by Silvaco. The scope of this research work has been divided into four (4) main parts. The main parts are gate workfunction, silicon body width and thickness, and doping concentration. Before the research work can be properly conducted, the pre-work has been done to get the desired designated JLT and JT devices. The pre-work is the research based on other researchers, study the Atlas manual, and rewrite the coding until the desired designated JLT and JT devices have been achieved. Then, the research work can proceed to the main parts of the research scopes.