Fabrication and characterization of engineered tunnel barrier for nonvolatile memory application /
This study focuses on the Variable Oxide Thickness (VARIOT) approach of engineered tunnel barrier where the asymmetrical VARIOT structure with the effective oxide thickness (EOT) ranging from 6 nm to 14 nm were studied in the form of MOS capacitor structure.
সংরক্ষণ করুন:
| প্রধান লেখক: | |
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| সংস্থা লেখক: | |
| বিন্যাস: | গবেষণাপত্র গ্রন্থ |
| ভাষা: | English |
| প্রকাশিত: |
Perlis, Malaysia
School of Microelectronic Engineering
2012.
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| বিষয়গুলি: | |
| ট্যাগগুলো: |
ট্যাগ যুক্ত করুন
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| সংক্ষিপ্ত: | This study focuses on the Variable Oxide Thickness (VARIOT) approach of engineered tunnel barrier where the asymmetrical VARIOT structure with the effective oxide thickness (EOT) ranging from 6 nm to 14 nm were studied in the form of MOS capacitor structure. |
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| দৈহিক বর্ননা: | 100 pages illustrations 30 cm. |
| গ্রন্থ-পঞ্জী: | Includes bibliographical references (pages 98-100). |