Fabrication and characterization of engineered tunnel barrier for nonvolatile memory application /
This study focuses on the Variable Oxide Thickness (VARIOT) approach of engineered tunnel barrier where the asymmetrical VARIOT structure with the effective oxide thickness (EOT) ranging from 6 nm to 14 nm were studied in the form of MOS capacitor structure.
Αποθηκεύτηκε σε:
| Κύριος συγγραφέας: | |
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| Συγγραφή απο Οργανισμό/Αρχή: | |
| Μορφή: | Thesis Βιβλίο |
| Γλώσσα: | English |
| Έκδοση: |
Perlis, Malaysia
School of Microelectronic Engineering
2012.
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| Θέματα: | |
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| Περίληψη: | This study focuses on the Variable Oxide Thickness (VARIOT) approach of engineered tunnel barrier where the asymmetrical VARIOT structure with the effective oxide thickness (EOT) ranging from 6 nm to 14 nm were studied in the form of MOS capacitor structure. |
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| Φυσική περιγραφή: | 100 pages illustrations 30 cm. |
| Βιβλιογραφία: | Includes bibliographical references (pages 98-100). |