Fabrication and characterization of engineered tunnel barrier for nonvolatile memory application /
This study focuses on the Variable Oxide Thickness (VARIOT) approach of engineered tunnel barrier where the asymmetrical VARIOT structure with the effective oxide thickness (EOT) ranging from 6 nm to 14 nm were studied in the form of MOS capacitor structure.
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Main Author: | Zarimawaty Zailan (Author) |
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Corporate Author: | Universiti Malaysia Perlis |
Format: | Thesis Book |
Language: | English |
Published: |
Perlis, Malaysia
School of Microelectronic Engineering
2012.
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