Fabrication and characterization of engineered tunnel barrier for nonvolatile memory application /
This study focuses on the Variable Oxide Thickness (VARIOT) approach of engineered tunnel barrier where the asymmetrical VARIOT structure with the effective oxide thickness (EOT) ranging from 6 nm to 14 nm were studied in the form of MOS capacitor structure.
Saved in:
| Main Author: | |
|---|---|
| Corporate Author: | |
| Format: | Thesis Book |
| Language: | English |
| Published: |
Perlis, Malaysia
School of Microelectronic Engineering
2012.
|
| Subjects: | |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|