APA (7th ed.) Citation

Uyemura, J. P. (2006). Chip design for submicron vlsi: CMOS layout and simulation. Thomson.

Chicago Style (17th ed.) Citation

Uyemura, John P. Chip Design for Submicron Vlsi: CMOS Layout and Simulation. Toronta: Thomson, 2006.

MLA (8th ed.) Citation

Uyemura, John P. Chip Design for Submicron Vlsi: CMOS Layout and Simulation. Thomson, 2006.

Warning: These citations may not always be 100% accurate.