APA (7th ed.) Citation

Navabi, Z. (2006). Verilog digital system design: RT level synthesis, testbench and verification (Second edition.). McGraw-Hill.

Chicago Style (17th ed.) Citation

Navabi, Zainalabedin. Verilog Digital System Design: RT Level Synthesis, Testbench and Verification. Second edition. New York: McGraw-Hill, 2006.

MLA (8th ed.) Citation

Navabi, Zainalabedin. Verilog Digital System Design: RT Level Synthesis, Testbench and Verification. Second edition. McGraw-Hill, 2006.

Warning: These citations may not always be 100% accurate.