Design and analysis of floting point multiplier
This final year project is about to design a 32-bits floating-point Multiplier, calculate the speed, delay, power delay product and area (in layout's size) for design, and to perform analysis on the experimental results in terms of the total power consumption, speed, delay, power delay product...
Đã lưu trong:
| Tác giả chính: | |
|---|---|
| Định dạng: | Điện tử Phần mềm Cơ sở dữ liệu |
| Ngôn ngữ: | English |
| Những chủ đề: | |
| Các nhãn: |
Thêm thẻ
Không có thẻ, Là người đầu tiên thẻ bản ghi này!
|
| Tóm tắt: | This final year project is about to design a 32-bits floating-point Multiplier, calculate the speed, delay, power delay product and area (in layout's size) for design, and to perform analysis on the experimental results in terms of the total power consumption, speed, delay, power delay product and area. |
|---|---|
| Mô tả sách: | Final Year Project |
| Mô tả vật lý: | 1 CD-ROM 4 3/4 in. |