Design and analysis of floting point multiplier
This final year project is about to design a 32-bits floating-point Multiplier, calculate the speed, delay, power delay product and area (in layout's size) for design, and to perform analysis on the experimental results in terms of the total power consumption, speed, delay, power delay product...
Saved in:
主要作者: | |
---|---|
格式: | 电子 软件 数据库 |
语言: | English |
主题: | |
标签: |
添加标签
没有标签, 成为第一个标记此记录!
|
System Under Maintenance
Our Library Management System is currently under maintenance.
Holdings and item availability information is currently unavailable. Please accept our apologies for any inconvenience this may cause and contact us for further assistance: