8-bits X 8-bits modified booth 1's complement multiplier
This project focuses on speed performance of the Modified Baugh-Wooley Two's Complement Signed Multiplier. Three methods to improve speed performance of the multiplier - reduce the number of partial products and accelerate the accumulation have been discussed in literature view. For Modified Ba...
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| Format: | Electronic Software Database |
| Language: | English |
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| Summary: | This project focuses on speed performance of the Modified Baugh-Wooley Two's Complement Signed Multiplier. Three methods to improve speed performance of the multiplier - reduce the number of partial products and accelerate the accumulation have been discussed in literature view. For Modified Baugh-Wooley Two's Complement Signed Multiplier the speed is improved by reducing the partial products and then summing these partial products using Carry Save Adder. The schematic design as well as speed performance analysis of this multiplier is done using Altera's Quartus II Software and speed obtained on EPF10K70. |
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| Item Description: | Final Year Project |
| Physical Description: | 1 CD-ROM 4 3/4 in. |