Design and realization of high speed multiplier accumulator (MAC) unit for low power applications

Design and realization of high speed multiplier accumulator (MAC) unit for low power applications

In this final year project, the designed multiplier accumulator (MAC) unit is an eight bit MAC unit in which capable to multiply unsigned and signed number. The methodologies need to carry out this project is to use the Mentor Graphic tools to draw and design whole MAC unit.

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Dades bibliogràfiques
Autor principal:	Mohd Nazri Mad Rejab (Autor)
Format:	Electrònic Software Base de dades
Idioma:	English
Matèries:	Microelectronics.
Etiquetes:	Afegir etiqueta Sense etiquetes, Sigues el primer a etiquetar aquest registre!

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