Low power multiplier accumulator (MAC) unit using sleepy stack technique
The main objective of this final year project is to provide new low power solutions for Very Large Scale Integration (VLSI) designers. In this final year project, a novel circuit structure called "sleepy stack" is presented. The sleepy stack is a combination of two well known low-leakage t...
Sábháilte in:
| Príomhchruthaitheoir: | |
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| Formáid: | Leictreonach Bogearraí Bunachar sonraí |
| Teanga: | English |
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| Clibeanna: |
Cuir clib leis
Níl clibeanna ann, Bí ar an gcéad duine le clib a chur leis an taifead seo!
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| Achoimre: | The main objective of this final year project is to provide new low power solutions for Very Large Scale Integration (VLSI) designers. In this final year project, a novel circuit structure called "sleepy stack" is presented. The sleepy stack is a combination of two well known low-leakage techniques which are the forced stack technique and the sleep transistor technique. |
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| Cur síos ar an mír: | Final Year Project |
| Cur síos fisiciúil: | 1 CD-ROM 4 3/4 in. |