Low power multiplier accumulator (MAC) unit using sleepy stack technique

Low power multiplier accumulator (MAC) unit using sleepy stack technique

The main objective of this final year project is to provide new low power solutions for Very Large Scale Integration (VLSI) designers. In this final year project, a novel circuit structure called "sleepy stack" is presented. The sleepy stack is a combination of two well known low-leakage t...

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Dades bibliogràfiques
Autor principal:	Aaron Selvam Thangamany (Autor)
Format:	Electrònic Software Base de dades
Idioma:	English
Matèries:	Microelectronics.
Etiquetes:	Afegir etiqueta Sense etiquetes, Sigues el primer a etiquetar aquest registre!

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