Fabrication and characterization of engineered tunnel barrier for nonvolatile memory application - Zarimawaty Zailan (School of Microelectronic Engineering, 2012)
This study focuses on the Variable Oxide Thickness (VARIOT) approach of engineered tunnel barrier where the asymmetrical VARIOT structure with the effective oxide thickness (EOT) ranging from 6 nm to 14 nm were studied in the form of MOS capacitor structure.