Miniaturized on-board and on-chip antenna design for integrated RF energy harvesting system - Masius, Alphonsos A (2019)
Radio Frequency (RF) energy harvesting refers to the concept of harvesting and recycling the RF energy in the surroundings that is widely broadcasted by many wireless systems. It is a promising technique that can be used to replace batteries or prolong their lifespan. Nowadays, mobility and low power consumption has led to small electronic circuitry, thus RF Energy Harvesting System (RFEHS) is desired to be miniature so that it can be integrated with other small systems as well. However, this will be a challenge as antenna is often the largest single component in the system. Furthermore, there are emerging demands on building RFEHS on a single silicon chip known as System on Chip (SoC) using Complementary Metal-Oxide-Semiconductor (CMOS) technology, but there is currently no extensive research that has been published regarding CMOS antenna design for lower sub 10-GHz frequency. Hence, this work presents the study on miniature antenna for RFEHS which is further divided into on-board design and on-chip design to consider both Printed Circuit Board (PCB) and CMOS technologies. In the on-board design, a high gain and miniature size are the main objectives, and the design process is conducted through mathematical approximation, followed by modelling and simulations in Computer Simulation Technology (CST) and verification through antenna’s fabrication and measurement. As a result, two on-board topologies have been evaluated which are the staircase shaped Co-Planar Waveguide (CPW) monopole antenna and Dielectric Resonator Antenna (DRA). The staircase shaped CPW monopole antenna is shown to have up to 32.19% improvement in term of received power compared to previous work. To assess the improvement of DRA against previous work, a way to find the Figure of Merit (FOM) is identified and it is found that the DRA have up to 90% higher FOM than others. The FOM takes into account the gain and volume to emphasize high gain and miniature size. Meanwhile, the on-chip design is based on 0.13 µm and 0.18 µm CMOS process technologies and two antenna topologies have been evaluated which are the spiral-slot design and spiral design. Studies involving the thicknesses of metals and substrate in CMOS technology have been performed and the results show that thicker metal and substrate contribute to an improved gain and bandwidth. The rate of bandwidth increment has a mean of 0.65 GHz per 8.25 µm increment of substrate thickness, while gain improvement is up to 18.45%. This work has also proposed a technique to transfer antenna design between different CMOS process technologies without having major effect on its gain and bandwidth through manipulation on the ground planes. The work has been fabricated considering the required standard thickness of the CMOS technology defined by the selected foundry. The on-chip antenna proposed has an area of less than 4 mm2 and thickness of less than 1 mm. Overall, miniature antenna design has been presented for on-chip and on-board topologies for RFEHS. It is hopeful that the contribution from this work can be used to achieve further advancement in miniature and integrated antenna and RFEHS development, thus providing a solution for energy issue.