APA (7th ed.) Citation

Nooraisyah Arasid. (2013). Three bit subtraction circuit via Field Programmable Gate Array (FPGA).

Chicago Style (17th ed.) Citation

Nooraisyah Arasid. Three Bit Subtraction Circuit via Field Programmable Gate Array (FPGA). 2013.

MLA (8th ed.) Citation

Nooraisyah Arasid. Three Bit Subtraction Circuit via Field Programmable Gate Array (FPGA). 2013.

Warning: These citations may not always be 100% accurate.