Universal asynchronous receiver/transmitter (UART) design quartus II environment /
Saved in:
| Main Author: | Ng, Sye Sye (Author) |
|---|---|
| Corporate Author: | Kolej Universiti Teknologi Tun Hussein Onn. Fakulti Kejuruteraan Elektrik dan Elektronik |
| Format: | Thesis Book |
| Language: | English |
| Published: |
Batu Pahat :
Kolej Universiti Teknologi Tun Hussein Onn,
2006.
|
| Subjects: | |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
-
Universal asynchronous receiver/transmitter (UART) design quartus II environment /
by: Ng, Sye Sye
Published: (2006) -
FPGA prototyping of universal asynchronous receiver-transmitter (UART) using altera VHDL implementation /
by: Nabihah@Nornabihah Ahmad
Published: (2005) -
FPGA prototyping of universal asynchronous receiver-transmitter (UART) using altera VHDL implementation /
by: Nabihah@Nornabihah Ahmad
Published: (2005) -
Designing 4-bit multiplier using Cadence tools /
by: Noor Azham Ibrahim
Published: (2006) -
VHDL-2008 : just the new stuff /
by: Ashenden, Peter J.
Published: (2008)