Electromigration modeling at circuit layout level /

Integrated circuit (IC) reliability is of increasing concern in present-day IC technology where the interconnect failures significantly increases the failure rate for ICs with decreasing interconnect dimension and increasing number of interconnect levels.  Electromigration (EM) of interconnects has...

Full description

Saved in:
Bibliographic Details
Main Author: Tan, Cher Ming (Author)
Corporate Author: SpringerLink (Online service)
Other Authors: He, Feifei
Format: eBook
Language:English
Published: Singapore Springer Singapore 2013.
Series:SpringerBriefs in Applied Sciences and Technology
Subjects:
Online Access:Click here to view the full text content
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:Integrated circuit (IC) reliability is of increasing concern in present-day IC technology where the interconnect failures significantly increases the failure rate for ICs with decreasing interconnect dimension and increasing number of interconnect levels.  Electromigration (EM) of interconnects has now become the dominant failure mechanism that determines the circuit reliability. This brief addresses the readers to the necessity of 3D real circuit modelling in order to evaluate the EM of interconnect system in ICs, and how they can create such models for their own applications. A 3-dimensional (3D) electro-thermo-structural model as opposed to the conventional current density based 2-dimensional (2D) models is presented at circuit-layout level. 
Physical Description:1 online resource (IX, 103 pages) 75 illustration, 2 illustration in colour.
ISBN:9789814451215
ISSN:2191-530X