Fabrication and simulation of pnp bipolar transistor basedvon spin on dopant technique and electrical characterrization

Fabrication and simulation of pnp bipolar transistor basedvon spin on dopant technique and electrical characterrization

This final year project cover of fabrication and simulation of pnp bipolar transistor based on electrical characterization and dopant concentration. From fabrication, the process will began from design mask layout, ion implantation, photolithography, diffusion and metallization. Then, a four point p...

保存先:

書誌詳細
第一著者:	Nursyida Azuddin (著者)
フォーマット:	電子媒体ソフトウェアデータベース
言語:	English
主題:	Microelectronics.
タグ:	タグ追加タグなし, このレコードへの初めてのタグを付けませんか!

類似資料

Study on diffusivity of gallium dopant in silicon using spin on dopant (SOD) technique
著者:: Mohd Rosydi Zakaria

Fabrication of 50 ¡Łm transistor and AINiAu interconnection process
著者:: Shaffie Husin

Simulation, fabrication and electrical characterization of p-Si capacitor design structure
著者:: Cherly, She Siew Yuet

The study on the effect of varing dopant concentration and diffusion time in the design of silicon avalanche diode with minimum VBR of 120+-20%
著者:: Yip, Siew Ling

The effect of annealing temperature and dopant concentration on the surface layer of vanadium doped barium strontium titanate (BVST) thin film
著者:: Siti Norhaida Abdul Rahman

Effect of annealing temperature and dopant concertration on the surface layer of indium doped Ba0.5Sr0.5Ti03 thin film
著者:: Noor Khairul Anuar Johari

Electrical characterization of 0.13℗æm CMOS transistor using TSUPREM-4 and MEDICI
著者:: Rusnita Rafee

Electrical characterization of 0.15um CMOS transistor using tsuprem-4 and medici
著者:: Low, Pooi Lam

The study of the effect of MOS transistor scaling on the critical device parameters
著者:: Zazurina Abd Rahman

Electrical characterization of 0.13℗æm NMOS transistor with retrograde well and halo implant structure respectively
著者:: Anas Redzuan Mokhtar

Fabrication, characterization and optimization of in-house MOSFET transistor using spin on dopant technique /
著者:: Marlia Morsin
出版事項: (2004)

Fabrication, characterization and optimization of in-house mosfet transistor using spin on dopant technique /
出版事項: (2010)

Theoretical study, simulation & fabrication on dry oxidation in terms of Si02 layer thinckness, resistivity & surface roughness
著者:: Mohd Adam Alias

Design, fabricating and characterizing a microfluidic capacitor
著者:: Anthonysamy, Raymond Anthony

Microfluidic poly-si electrodes capacitor (fabricate & testing)
著者:: Esmal Fhadly Abd Malek

Device simulation of silicon germanium heterojunction bipolar transistor
著者:: Lili Juliana Bt Abu Bakar

Simulation on parameter and characteristics extraction between two simulation packages (synopsys and pspice)
著者:: Nor Aznin Sakrani

Design and simulation of piezoresistive pressure sensor
著者:: Mohd Hilmi Mohd Nor

Design and simulation of PZT piezoelectric microphone
著者:: Muhammad Aiman Ab. Mahat

Design and simulation of piezoresistive tectile sensor
著者:: Nahmar Harun

Design and simulation of silicon-based magnetic sensor/
著者:: Nor Azlan Mohamed
出版事項: (2011)

Design, Simulation and Characterization of Moly Permalloy based Electromagnetic sensor/
著者:: Palianysamy, Moganraj
出版事項: (2011)

Fabrication and characterization of barium strontium titanate (BA1-XSRXTI03BST) for heat sensor application
著者:: Mohd Hafiz Shaari

Advanced device modeling and simulation /
出版事項: (2003)

Design and simulation of CMOS operational amplifier using mentor graphics tool
著者:: Ramalu, Jegatheesan Sri

Simulation for forming shallow trench isolation in the Ic using TCAD tools
著者:: Mohd Faiz Mohd Fauzan

Design a current mirror using body driven technique
著者:: Siti Zawana Abdul Rani

Improvement of SiGe HBT design and technology performance using device simulation
著者:: Nurradila Rahman

Simulation of ion implantation using Monte Carlo method for investigation on ion trajectories
著者:: Zainab Ramli

Simulation dan design of 8-BIT successive approximation analog-To-Digital converter/
著者:: Mohd Farid Kamil Fadzil
出版事項: (2011)

Simulation on effect of different types of channel/ drain engineering structure on MOS device performance
著者:: Norazlina Mohd Amin

Investigation and modelling of boron diffusion reduction in silicon by fluorine implantation using numerical simulation
著者:: Chuah, Soo Kiet

Simulation of 0.35 Um NMOS process based on UniMAP Cleanroom facilities
著者:: Izny Atikah Ahmad Fahmi

Random number generator simulation and digital IC design from inverse congruential algorithm/
著者:: Ahmad Firdaus Mohd Razy
出版事項: (2011)

The effect of process parameters on metal step coverage for aluminum (AI) by evaporation technique
著者:: Noraishah Azman

Low power multiplier accumulator (MAC) unit using sleepy stack technique
著者:: Aaron Selvam Thangamany

Study and design the current mirror using bulk-driven technique for low voltage analog
著者:: Mohd Faidzul Bukhari Mohd Kanafiah

A Study of Proper Integrated Circuit (IC) Layout Techniques for a Parallel Adder/
著者:: Kau, Zee Shuang
出版事項: (2011)

Synthesis, layout design and simulation of 8-bit serial peripheral interface (SPI) using Leonardo spectrum and mentor graphics
著者:: Siti Aifa Zafirah Ahmad

Coherent effect on LOCOS and STI technique for 0.18℗æm CMOS technology using taurus workbench
著者:: Wan Shafie Wan Sulaiman